1. Technical Field
The present invention relates generally to data communications. More particularly, the present invention relates to circuitry for high-speed data links.
2. Description of the Background Art
High-speed data links are used to communicate data between devices in a system. Serial interface protocols have been developed at increasingly fast data rates for such high-speed links. Examples of industry-standard protocols for serial interfaces include PCI Express® (Peripheral Component Interconnect Express), XAUI (X Attachment Unit Interface), sRIO (serial Rapid IO), and others.
As the operating speed of the high-speed data links increases to rates which are tens of gigabits per second (Gbps), sophisticated equalization schemes become more necessary to compensate for high-frequency signal loss. Unfortunately, while equalization circuitry may be designed to implement a complex equalization technique, such circuitry typically consumes a large amount of power and is generally inflexible in terms of meeting the requirements of various different types of applications.